The People Behind the Silicon

200+ Engineers. One Goal.

Our team is built from veterans of the world's most demanding semiconductor companies — now united around solving your hardest engineering challenges.

Leadership

Meet Our Leadership Team

Srinivasa Gupta Cheedella
Srinivasa Gupta Cheedella
CEO
IIT Madras, 25+ yrs of exp, STEricsson, Infineon, Harman, SmartSoC.
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Prasanna Kumar TA
Prasanna Kumar Thadapaneni
Co founder, Physical design business head
Long standing member of Soctronics Group of Companies with 20+ Tapeout Experience.
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Suneetha Tata
Suneetha Tata
COO
IIT Guwahati MTech. CSU, Sacramento, USA. MBA. Ex: Conexant, Qualcomm, Audience.
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Sridhar Nandula
Sridhar Nandula
VP, Digital Design
IIT Madras M.Tech. IIM Calcutta. Worked with Qualcomm, Maxlinear, Nokia.
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Ramesh Babu
Ramesh Babu
Head of Embedded BU
28+ Years of Experience in Automotive and Embedded. Ex: KPIT, SmartSoC.
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Madhukar Reddy
Madhukar Reddy
Head of Silicon Validation
18+ Years of Experience across Intel, AMD, Infineon.
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Fakhrul Islam
Fakhrul Islam
Head of Strategy, Go-to-Market & Business Growth
Driving Strategy and Growth through GTM and Partnerships
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Shashank Vaidyar
Shashank Vaidyar
Marketing Manager
Specializing in Brand Strategy & B2B Marketing Growth. Ex: SmartSoC.
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Team Strength

200+ Engineers Across 8 Disciplines

200+
Total Engineers
4+
Avg. Yrs Experience
4
India Offices
4.0
Glassdoor Rating
10+
RTL Design Engineers
SystemVerilog, VHDL, SoC micro-architecture
55+
Verification Engineers
UVM, formal verification, coverage-driven
55+
Physical Design Engineers
Place & route, STA, power analysis
28+
Embedded Engineers
BSP, RTOS, firmware, Linux drivers
14+
AI Silicon Engineers
NPU design, ML hardware architecture
15+
Program Managers
Project delivery, client communication
20+
Emulation & SystemC Engineers
Pre-silicon emulation, SystemC/TLM modelling
30+
DFT Engineers
Scan insertion, ATPG, MBIST, boundary scan
Join Our Team

Work on Silicon That Matters

We're always looking for exceptional semiconductor engineers. 5.0 Glassdoor rating. Flexible engagement models. Challenging work on cutting-edge chips.